1. Field of the Invention
The present invention relates to a technique of detecting an abnormal operation of memory built in an integrated circuit and the like of a micro-computer and the like with regard to an access speed and the like.
2. Description of the Related Art
A flash memory is built in some integrated circuits of micro-computers and the like. A control circuit for rewriting and erasing data is added to the integrated circuits in which a memory is built, replacing a mask read only memory with a flash memory and the like. In this conventional integrated circuit, a method for checking the reliability of the written data continuously does not exist.
In the integrated circuits in which a flash memory and the like is built, however, the written data sometimes changes due to a write-in disturbance in rewriting data, a read disturbance in reading out data, a data retention or the like. Or even though the data does not change, the period of time from inputting an address to outputting data, that is, the access time, of the memory sometimes becomes significantly long. If the access time becomes long, the data-outputting cannot keep up with the operation speed of the integrated circuit of the micro-computer and the like. As a result, an error is to occur in the integrated circuit. Especially in the case of using a flash memory for storing an operation program in a micro-computer and the like, the micro-computer cannot operate normally even when the data output wrongly from the flash memory by only one bit. Therefore, a high cost is needed to ensure the reliability of a memory for storing a program.
In order to correct the error of the output from the memory, using an error correction code (hereafter, referred to as the “ECC”) may be considered. In this case, however, a parity bit for correcting is needed as well as a bit for data. And in some cases, a storage capacity is to be needed 1.5 times as much as the program capacity to be actually used. This makes the chip size increase and the cost high. Moreover, the ECC cannot correct the error of data with two bits or more in a single address.